#ifndef ADC_UIO_H
#define ADC_UIO_H

#include <stdint.h>
#include "usr_typedef.h"

typedef struct adc_handle_t{
	int32_t             mem_uio_fd;
	int32_t             adc_axi_uio_fd;

	uint32_t            adc_axi_addr_size;
	uint32_t            adc_axi_base_addr;
	uint32_t           *adc_axi_virt_addr;

	uint32_t            adc_data_phy_addr;
	uint32_t           *adc_data_virt_addr;
    
	int32_t             irq_flag;
	uint16_t			irq_cnt;
}adc_handle;


typedef struct speed_handle_t{
	int32_t             mem_uio_fd;
	int32_t             spd_axi_uio_fd;

	uint32_t            spd_axi_addr_size;
	uint32_t            spd_axi_base_addr;
	uint32_t           *spd_axi_virt_addr;

	uint32_t            spd_data_phy_addr;
	uint32_t           *spd_data_virt_addr;
}speed_handle;


/* ad axi lite control register flags */
#define ADS1672_REG0_OFFSET          0x00 //channel enable
#define ADS1672_REG1_OFFSET          0x01 //reset
#define ADS1672_REG2_OFFSET          0x02 //sample freq
#define ADS1672_REG3_OFFSET          0x03 //clean int
#define ADS1672_REG4_OFFSET          0x04 //interrupt counter
#define ADS1672_REG5_OFFSET          0x05 //ch0 calibration
#define ADS1672_REG6_OFFSET          0x06 //ch1 calibration
#define ADS1672_REG7_OFFSET          0x07 //ch2 calibration
#define ADS1672_REG8_OFFSET          0x08 //ch3 calibration
#define ADS1672_REG9_OFFSET          0x09 //ch4 calibration
#define ADS1672_REG10_OFFSET         0x0A //ch5 calibration
#define ADS1672_REG11_OFFSET         0x0B //ch6 calibration
#define ADS1672_REG12_OFFSET         0x0C //ch7 calibration

#define AD_CHANNELX_OFFSET          0x400000

#define AD_CHANNEL1_OFFSET          0x0000000
#define AD_CHANNEL2_OFFSET          0x0400000
#define AD_CHANNEL3_OFFSET          0x0800000
#define AD_CHANNEL4_OFFSET          0x0C00000
#define AD_CHANNEL5_OFFSET          0x1000000
#define AD_CHANNEL6_OFFSET          0x1400000
#define AD_CHANNEL7_OFFSET          0x1800000
#define AD_CHANNEL8_OFFSET          0x1C00000

#define AD_CHANNEL_CTL_BASE         0xA0000000
#define AD_DATA_CHANNEL_BASE        0x7C000000
#define AD_CHANNEL_DATA_SIZE        0x2000000


#define SPEED_REG2_OFFSET			0x02
#define SPEED_REG3_OFFSET			0x03
#define SPEED_REG4_OFFSET			0x04


#define SPD_CHANNEL_CTL_BASE        0xA0030000
#define SPD_DATA_CHANNEL_BASE       0x7A000000
#define SPD_CHANNEL_DATA_SIZE       0x800000
#define SPD_CHANNELX_OFFSET         0x400000



void adc_axi_reg_set(adc_handle *padc, uint32_t offset, uint32_t val);
uint32_t adc_axi_reg_get(adc_handle *padc, uint32_t offset);
uint32_t speed_axi_reg_get(speed_handle *pspd, uint32_t offset);
void adc_init(sys_cfg_info *sys, adc_handle *padc, chx_cfg_info *chx);
void adc_mmap_setup(adc_handle* padc, uint32_t data_phy_addr);
void speed_mmap_setup(speed_handle* pspd, uint32_t data_phy_addr);


extern adc_handle			adc_dev;
extern speed_handle			spd_dev;

#endif

